40nm PMU IP

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Compare 10 IP from 3 vendors (1 - 10)
  • USB 2.0 picoPHY in GF (40nm, 28nm)
    • Complete mixed-signal physical layer for single-chip USB 2.0 OTG and non-OTG applications
    • Small PHY macro area
    • Low power
    • Advanced power management features, including support for power supply gating, supply scaling, ultra-low standby current support, and power management unit (PMU) interrupt support
  • USB 2.0 picoPHY in UMC (40nm, 28nm)
    • Complete mixed-signal physical layer for single-chip USB 2.0 OTG and non-OTG applications
    • Small PHY macro area
    • Low power
    • Advanced power management features, including support for power supply gating, supply scaling, ultra-low standby current support, and power management unit (PMU) interrupt support
  • USB 2.0 picoPHY in TSMC (40nm, 28nm)
    • Complete mixed-signal physical layer for single-chip USB 2.0 OTG and non-OTG applications
    • Small PHY macro area
    • Low power
    • Advanced power management features, including support for power supply gating, supply scaling, ultra-low standby current support, and power management unit (PMU) interrupt support
  • USB 2.0 femtoPHY in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, 10nm, N7, N6, N5, N3P)
    • Complete mixed-signal physical layer for single-chip USB 2.0 Host, Device, and Dual Role applications Small PHY macro area: as small as 0.20 mm2
    • Low power: as low as 50mW (during high-speed packet transmission)
    • Advanced power management features including support for power supply gating, supply scaling, ultra-low standby current support, and power management unit (PMU) interrupt support
    • Supports USB 2.0 ID-pin detection and OTG Voltage Detectors
  • USB 2.0 femtoPHY in SMIC (40nm, 28nm)
    • Complete mixed-signal physical layer for single-chip USB 2.0 Host, Device, and Dual Role applications Small PHY macro area: as small as 0.20 mm2
    • Low power: as low as 50mW (during high-speed packet transmission)
    • Advanced power management features including support for power supply gating, supply scaling, ultra-low standby current support, and power management unit (PMU) interrupt support
    • Supports USB 2.0 ID-pin detection and OTG Voltage Detectors
  • Linear Battery Charger
    • CC/CV charge
    • Trickle charge when battery voltage is low
    • Adjustable charging current with temperature compensation
    • Highly accurate end-of-charge voltage
    • Load short protection
    Block Diagram -- Linear Battery Charger
  • Ultra low power LDO
    • 500mA maximum output current
    • Ultra low quiescent current
    • low dropout voltage
    • Current limit protection
    • OTP/OVP/UVP/PGOOD
    Block Diagram -- Ultra low power LDO
  • Ultra low power DCDC
    • PWM mode and PSM mode control
    • 2A maximum output current
    • Dynamic output voltage scaling
    • Spread-spectrum frequency modulation
    Block Diagram -- Ultra low power DCDC
  • GNSS (GPS, Galileo, GLONASS, Beidou3, QZSS, SBAS) Ultra-low power RF Receiver IP
    • Multiple Constellation tracking simultaneously
    • Fully integrated transceiver
    • Supports all constellations including GPS, Galileo, GLONASS, Beidou3, QZSS, NavIC, SBAS, A-GPS
    • Supports L1 and L5 bands
    Block Diagram -- GNSS (GPS, Galileo, GLONASS, Beidou3, QZSS, SBAS) Ultra-low power RF Receiver IP
  • Bluetooth Dual Mode v4.2 RF Transceiver IP
    • TSMC40nm
    • High Volume Silicon Proven
    • Extracted from Design Data Base of production chip
    • Integrated balun
    Block Diagram -- Bluetooth Dual Mode v4.2 RF Transceiver IP
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Semiconductor IP