2nm mipi d-phy c-phy IP

Compare 211 IP from 17 vendors (1 - 10)

Simulation VIP for MIPI D-PHY, C-PHY and A-PHY
- PHY Monitor
- Built-in scoreboarding between serial/PPI interface, also monitors error signal interface
- Reports any detected error on any lane on serial interface and is not reflected on PPI interface
- C-PHY and D-PHY
MIPI C-PHY, D-PHY, SLVDS RX- TSMC 12FFC 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- Compliant to MIPI Alliance Standard for C-PHY specification Version 1.2
- Compliant to MIPI Alliance Standard for D-PHY specification Version 1.2
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC7FF 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC7FF 1.8V, N/S, for Automotive, ASIL B Random, AEC-Q100 Grade 2
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC6FFC 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC6FF 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
- Compliant with the MIPI D-PHY specification, v2.1
- 4 Lanes in D-PHY mode up to 6.5Gb/s per lane
- Compliant with the MIPI C-PHY specification, v2.0
- 3 trios in C-PHY mode up to 6.5Gs/s per trio

2nm MIPI D-PHY c-phy IP