JEDEC® compliant FLASH memory controller ideal for interfacing to a wide range of parallel FLASH memory components such as the popular SST39 series from Microchip®.
Features a fully synchronous command interface and a set of configurable timing parameters for compatibility with different devices.
Parallel FLASH Memory Controller
Overview
Key Features
- Provides the physical interface between your FPGA/ASIC and the external FLASH
- Easy-to-use synchronous command interface
- JEDEC® standard Flash EEPROM pinouts and commands
- Fully configurable timing parameters to suit different manufacturers
- Configurable command FIFO compensates for System/FLASH speed differences
- Wide range of 8-bit and 16-bit FLASH memories supported
- Vendors such as Microchip®, Atmel®, Spansion® and STmicroelectronics®
- Examples include the SST39*, AT49*, AM29* and M29* series of memory ICs
Benefits
- Technology independent soft IP Core
- Suitable for FPGA, SoC and ASIC
- Supplied as human-readable source code
- One-time license fee with unlimited use
- Field tested and market proven
- Any custom modification on request
Block Diagram
Deliverables
- VHDL source-code (or Verilog on request)
- Simulation test bench
- Examples and scripts
- Full pdf datasheet
- One-to-one technical support
- One years warranty and maintenance
Technical Specifications
Foundry, Node
All
Availability
Immediate
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