Memory & Libraries IP for Silterra
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Memory & Libraries IP
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64
Memory & Libraries IP
for Silterra
from 6 vendors
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10)
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1.25 Gbps Four-Channel (4CH) LVDS Serializer with Pre-emphasis
- 25-180 MHz clock support
- Up to 1.25 Gbps bandwidth
- Up to 5.0 Gbps data throughput
- Low power CMOS design
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1.25 Gbps 4-Channel LVDS Deserializer in Samsung 28FDSOI
- 25-180 MHz clock support
- Up to 1.25 Gbps bandwidth
- Up to 5.0 Gbps data throughput
- Full Low power CMOS design
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LCD Host LVDS Interface, Dual Pixel 20-112Mhz (SVGA/QXGA)
- 1P6M layout structure based on 0.18um 1P6M 1.8V generic logic process.
- 3.3V/1.8V ±10% supply voltage, -40/+125°C
- Complies with OpenLDI specification for digital display interfaces and LVDS IEEE Standard 1596.3-1996+ ANSI/TIA/EIA-644-A Specifications.
- Up to 5.38Gbps bandwidth
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OTP One Time Programmable IP SIL180
- Small IP Size
- High reliability
- Radiation hardening
- 100% CMOS process compatiable, no additional process and mask
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OTP One Time Programmable IP SIL130HV
- Small IP Size
- High reliability
- Radiation hardening
- 100% CMOS process compatiable, no additional process and mask