The logiREF-ACAP-VDF "ACAP IP Framework for Multi-Camera Vision Applications" enables Xylon logiVID-ACAP-6CAM ACAP Vision Development Kit users to quickly utilize the provided hardware platform for the development of AMD-Xilinx Versal Adaptive Compute Acceleration Platform (ACAP) based embedded multi-camera vision systems. The framework includes pre-verified logicBRICKS reference design for video capture from six Xylon video cameras and the display output under Linux OS. The framework showcases the advantages of the Versal ACAP platform by visualizing 6 camera streams in parallel, with or without running advanced image filters, and with real-time LIDAR data that is visualized instantly on the screen in the form of a 3D point cloud.
Instead of starting from scratch and having to spend months designing and building a new design framework, users of the logiREF-ACAP-VDF design framework can immediately focus on specific vision-based parts of their next ACAP design. This design implements six parallel video inputs from Xylon video cameras and the display output with RGB overlay. All video inputs are stored in the video memory, and by mean of on-board push buttons, the user can select each of them for the single camera or all cameras full screen display output.
All logicBRICKS IP cores are supplied with bare-metal and appropriate Linux software drivers. The provided video capture and display demo applications run in Linux OS.
Video Design Framework for Multi-camera Vision Applications
Overview
Key Features
- Complete video design framework for embedded multi-camera vision applications
- Enables vision developers to quickly add their own algorithms to the provided infrastructure
- Prepared for the Xylon logiVID-ACAP-6CAM kit in combination with the AMD-Xilinx VersalTM AI VCK190 Evaluation Kit
- The reference design demonstrates video capture and display of six video camera inputs, as well as LIDAR 3D Data Point Visualization
- Design is prepared for Xilinx Vivado® Design Suite 2021.2 & Vitis Unified Software Platform
- Input video resolution: 1928x1208@30fps
- Output video resolution: 1920x1080@60fps
- Jump-starts the development and saves valuable design time
- Runs on Linux OS and includes logicBRICKS software drivers and demos
- Full evaluation version of the design framework is available
- Documentation and Tech support (e-mail)
Block Diagram
Technical Specifications
Related IPs
- HDR ISP framework for multi-camera applications
- Full HD/UHD video and vision integrated platform solution
- Full HD/UHD multi-stream video and vision integrated platform solution
- Full HD video and vision integrated platform solution
- HD video and vision integrated platform solution
- ARC EV Processors are fully programmable and configurable IP cores that are optimized for embedded vision applications