VESA DSC Decoder IIP

Overview

DSC DECODER core is compliant with standard VESA Display Stream Compression version 1.1/1.2/1.2a. Through its compatibility, it provides a simple interface to a wide range of low-cost devices. DSC DECODER IIP is proven in FPGA environment. The host interface of the DSC DECODER can be simple interface or can be AHB, AHB-Lite, APB, AXI, AXI-Lite, Tilelink, OCP, VCI, Avalon, PLB, Wishbone or custom buses.

VESA DSC Decoder IIP is supported natively in Verilog and VHDL

Key Features

Compliant with VESA Display Stream Compression Version 1.1, 1.2 and 1.2a.
Full DSC Decoder functionality.
Supports below coding schemes,

Modified Median-Adaptive Prediction (MMAP)
Block Prediction (BP)
Midpoint Prediction (MPP)
Indexed color history (ICH)

Compatible with RGB/YCbCr 4:4:4, YCbCr 4:2:2 simple, YCbCr 4:2:2 native and YCbCr 4:2:0 native coding.
Compatible with 8, 10, 12, 14 and 16 bits per component.
Compatible with 1, 2, 4, 8, 12, 16, 20, 24 Slice decoding.
Supports backward compatible to DSC v1.1.
Supports maximum display resolution up to 8K.
Supports Input Buffering compatible with transport stream over video interfaces like HDMI2.1, MIPI DSI and DisplayPort.
Verified with VESA DSC 1.2a C model using sample images.
Supports PPS 128 bytes block decoding.

Benefits

Single site license option is provided to companies designing in a single site.
Multi sites license option is provided to companies designing in multiple sites.
Single Design license allows implementation of the IP Core in a single FPGA bitstream and ASIC.
Unlimited Designs, license allows implementation of the IP Core in unlimited number of FPGA bitstreams and ASIC designs.

Block Diagram

Deliverables

The DSC DECODER interface is available in Source and netlist products.
The Source product is delivered in plain text verilog.If needed VHDL,SystemC code can also be provided.
Easy to use Verilog Test Environment with Verilog Testcases
Lint, CDC, Synthesis, Simulation Scripts with waiver files
IP-XACT RDL generated address map
Firmware code and Linux driver package
Documentation contains User's Guide and Release notes.

Technical Specifications

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