VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler,Memory Array Range:512 to 512K Bits
Overview
VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um Logic 1P8M Salicide 1.2/2.5(3.3)V process can flexibly generate memory blocks via a friendly GUI or shell commands. The compiler supports a comprehensive range of words and bits. While satisfying the low power and speed requirements, it has been optimized for area efficiency. VeriSilicon SMIC Synchronous Ultra-Low-power Single-Port SRAM compiler uses four layers within the blocks and supports metal 6, 7 or 8 as the top metal. Dummy bit cells are synthesized in with the intention to enhance reliability.
Key Features
- Single Read/Write Port
- Low Power Consumption
- High Density
- High Speed
- Size Sensitive Self-time Delay for Fast Access Automatic Power Down
- Tri-state Output
- Write Mask Function
Technical Specifications
Foundry, Node
SMIC 0.13um
Maturity
Silicon proven
SMIC
Pre-Silicon:
130nm
EEPROM
,
130nm
G
,
130nm
LL
,
130nm
LV
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