VeriSilicon SMIC 0.13um Syn. LP VROM Compiler, Memory Array Range:128 to 1Mega Bits
Overview
VeriSilicon SMIC 0.13um Synchronous programmable Low Power Via1 ROM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um Logic 1P8M Salicide 1.2/2.5(3.3)V process can flexibly generate memory blocks via a friendly GUI or shell commands. The compiler supports a comprehensive range of word length and bit length. While satisfying Low Power, Low Leakage and speed requirements, it has been optimized for area efficiency. VeriSilicon SMIC 0.13um Synchronous Low Power Via1 ROM compiler uses three metal layers within the blocks and supports metal 6, 7 or 8 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
Key Features
- Low power
- Low Leakage
- High Density
- Size Sensitive Self-time Delay for Fast Access and "Zero" Hold Time
- Automatic Power Down
Technical Specifications
Foundry, Node
SMIC 0.13um
Maturity
Silicon proven
SMIC
Pre-Silicon:
130nm
EEPROM
,
130nm
G
,
130nm
LL
,
130nm
LV
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