M31 provides customers the next generation of USB 2.0 IP with an extremely compact die area and lower active and suspend power consumption. M31 utilizes a whole new design architecture to implement the USB 2.0 IP without sacrificing the performance associated with USB 2.0. The USB 2.0 IP is not only suitable for USB peripherals, but also an optimized solution for SOCs that desire multiple USB ports.
USB2.0 Dual-Role PHY, TSMC N7, N/S orientation, type-C (ASIL-B)
Overview
Key Features
- Smallest USB 2.0 PHY IP worldwide (IP size of 55nm, 40nm, 28nm, and 16/12nm are less than 0.2mm2)
- Fully compliant with Universal Serial Bus (USB) 2.0 electrical specification
- Compliant with UTMI+ specifications (High-Speed, Full-Speed, and Low-Speed functions)
- Supports clock inputs from 10/12/19.2/24/25/27/30/40MHz crystal oscillator or external clock source
- Integrated PLL to provide a variety of stand-alone clock outputs for USB related applications
Block Diagram
Technical Specifications
Foundry, Node
TSMC N6
TSMC
Pre-Silicon:
6nm
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