USB 3.0 PHY in SMIC (110nm, 65nm, 40nm)

Overview

The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer applications such as digital cameras, networking and storage as well as next– generation feature-rich smartphones, tablets, digital TVs and media players requiring high throughput USB capability. The Synopsys USB-C 3.0 femtoPHY also offers support for the reversible USB Type-C™ connector. Offering reduced silicon cost and longer battery life, the Synopsys USB-C and USB 3.0 femtoPHY IP offers a small die size with low power consumption. The Synopsys USB-C 3.0 femtoPHY is optimized to reduce pin count by 40% compared to dual-PHY solutions and removes the need for external switch components.

Key Features

Complete mixed-signal physical layer for USB 3.0 applications
Includes all circuitry needed for operation at all USB speeds (SuperSpeed, High-Speed, FullSpeed, Low-Speed)
USB-C 3.0 femtoPHY supports Type-C reversible connectors
Optimized PHY area (<0.5mm2 for USB 3.0, <0.8mm2 for USB-C 3.0)
Hard macro with snap-on flip-chip bumps including all electrostatic discharge (ESD) protection
Low power consumption (~70mW SuperSpeed, ~50mW High-Speed)
Fully compatible with the Synopsys USB 3.0 Host, DualRole Device, and Device Controllers
Supports all power management features
OTG functionality, VBUS comparators
Single reference clock input for all USB speeds
Wide range of reference clocks supported: 19.2, 20, 24, 25, 26, and 100 MHz
Minimal external component cost
Integrated 3.3-V-to-1.8-V regulator in PHY hard macro
Architecture designed to minimize effects due to foundry process, chip and board parasitics, and process device model variations
Built-In Self-Test (BIST) features for efficient production testing of all USB speeds
Advanced, built-in diagnostics including SuperSpeed 5 Gbps onchip “sampling scope”
Powerful debug capabilities
IEEE standards 1149.1 and 1149.6 (JTAG) boundary scan for internal visibility and control

Benefits

Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
Supports SuperSpeed 5 Gbps data rate and is backward compatible with all USB 2.0 data rates including 480 Mbps (High-Speed), 12 Mbps (Full-Speed) and 1.5 Mbps (Low-Speed)
Integrates high-speed, mixed-signal custom CMOS circuitry designed to PIPE3 and UTMI+ Level 3 specifications
Can be used in USB Host, Device and Dual Role Port applications
Synopsys USB-C 3.0 femtoPHY IP supports the USB Type-C connector standard
Designed for easy integration with Synopsys USB 3.0 Controllers

Applications

Laptops
Tablets
Mobile phones
Storage
Cameras ` DTVs

Technical Specifications

Foundry, Node

SMIC 110nm, 65nm, 40nm - G, LL

Maturity

Available on request

Availability

Available

SMIC

Pre-Silicon: 40nm LL , 65nm LL , 110nm G

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