UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with ROW redundancy with LVt peripheral
Overview
UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with ROW redundancy with LVt peripheral
Technical Specifications
Foundry, Node
UMC 40nm
Maturity
Silicon proven, Formal release
UMC
Pre-Silicon:
40nm
,
40nm
LP
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