UMC 65nm standard performance Logic process synchronous extra high speed Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 65nm SP process
Overview
Technical Specifications
Short description
Single Port SRAM Compiler IP, UMC 65nm SP process
Vendor
Vendor Name
Foundry, Node
UMC 65nm SP
UMC
Pre-Silicon:
65nm
SP
Related IPs
- Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
- Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
- Single Port SRAM compiler - Memory optimized for ultra high density and high speed - Dual Voltage - compiler range up to 640 k
- Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
- Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k
- Single Port SRAM compiler - Memory optimized for ultra low leakage and high density - Dual Voltage - compiler range up to 640 k