UMC 0.5um Logic process standard asynchronous high density two port (1R1W) SRAM memory compiler.
Overview
UMC 0.5um Logic process standard asynchronous high density two port (1R1W) SRAM memory compiler.
Technical Specifications
Short description
UMC 0.5um Logic process standard asynchronous high density two port (1R1W) SRAM memory compiler.
Vendor
Vendor Name
Foundry, Node
UMC 0.5um Logic/Mixed_Mode Generic
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