UMC 0.45um Logic process standard gate array asynchronous embedded array high density two port (1R1W) SRAM memory compiler.
Overview
UMC 0.45um Logic process standard gate array asynchronous embedded array high density two port (1R1W) SRAM memory compiler.
Technical Specifications
Short description
UMC 0.45um Logic process standard gate array asynchronous embedded array high density two port (1R1W) SRAM memory compiler.
Vendor
Vendor Name
Foundry, Node
UMC 0.45um Logic/Mixed_Mode Generic
Related IPs
- Single Port SRAM Compiler IP, UMC 65nm SP process
- UMC 0.45um Logic process standard gate array asynchronous metal programmed ROM memory compiler.
- UMC 0.45um Logic process standard gate array asynchronous high density single port SRAM memory compiler.
- Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
- Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
- Single Port SRAM compiler - Memory optimized for ultra high density and high speed - Dual Voltage - compiler range up to 640 k