UMC 0.11um HS/FSG Logic Process high density MPCA core cell library with minimum Via1 to M4 programming

Overview

UMC 0.11um HS/FSG Logic Process high density MPCA core cell library with minimum Via1 to M4 programming

Technical Specifications

Short description
UMC 0.11um HS/FSG Logic Process high density MPCA core cell library with minimum Via1 to M4 programming
Vendor
Vendor Name
Foundry, Node
UMC 0.11um
Maturity
Pre-Silicon release
UMC
Pre-Silicon: 110nm
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Semiconductor IP