UHF Passive RFID Front-End - EPCGlobal Class 1 Gen 2/ISO18000-6C Compliant

Overview

This macro-cell is an ultra low power analog/RF front-end core designed for SilTerra 0.18μm CMOS technology. It is ideal for use in passive UHF RFID integrated circuits compliant with EPCGlobal Class 1 Gen 2 / ISO18000-6C standards.

The circuit features a complete analog/RF front-end including rectifier, demodulator, backscattering modulator, a power management unit (PMU) and a short-term memory (STM) that generates the persistence flags. The PMU includes an output supply voltage limiter, internal voltage and current references, built-in power-on-reset (POR), and oscillator. Internal blocks are trimmable via a digital word that can reside in the non-volatile memory of the chip.

Key Features

  • −12dBm read sensitivity
  • Output supply voltage from 1V to 1.8V
  • Internal 1.12V voltage reference
  • Internal 15.5nA current bias
  • Internal 2MHz oscillator
  • Built-in POR
  • Persistence flags generator
  • Current consumption: 1.5µA

Block Diagram

UHF Passive RFID Front-End - EPCGlobal Class 1 Gen 2/ISO18000-6C Compliant Block Diagram

Applications

  • Passive/Active EPCGlobal C1G2 / ISO18000-6C RFID tag ICs

Deliverables

  • Datasheet/Integration Guide
  • HDLModel
  • Flat GDSII database/LVS netlist
  • Customer Support

Technical Specifications

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Semiconductor IP