The SiFive U54 Standard Core is a single-core instantiation of the world's first RISC-V application processor, capable of supporting full-featured operating systems such as Linux.
The U54 is ideal for low-cost Linux applications such as IoT nodes and gateways, point-of-sale, and networking.
U54 Linux-capable RISC V application processor
Overview
Key Features
- Fully compliant with the RISC-V ISA specification
- RV64GC U54 Application Core
- 16KB L1 I-cache with ECC
- 16KB L1 D-cache with ECC
- 8 Region Physical Memory Protection
- 48 Local Interrupts per core
- Sv39 Virtual Memory support with 38 Physical Address bits
- Integrated 128KB L2 Cache with ECC
- Real-time capabilities
- Both the L1 Instruction Cache and the L2 Cache can be configured into high speed deterministic SRAMs
- CLINT for multi-core timer and software interrupts
- PLIC with support for up to 128 interrupts with 7 priority levels
- Debug with instruction trace
- U54 Performance
- 2.87/1.7 DMIPS/MHz (Best Effort/Legal)
- 2.75 CoreMark/MHz
Block Diagram
Technical Specifications
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