TSN Verification IP

Overview

The Ethernet TSN Verification IP provides an effective & efficient way to verify the components interfacing with an IP or SoC. The Ethernet TSN VIP is fully compliant with IEEE standard 802.3-2018 specification and TSN features as compliant to the standards mentioned by the IEEE 802.1 working group. This VIP is light weight with easy plug-and- play interface so that there is no hit on the design cycle time.

Key Features

  • Provides Ethernet fully compliant to 802.3-2018 supporting all Media Independent Interfaces for (1/10/25/40/50/100/ 200/400 G)
  • QBV support
  • Capable of handling VLAN-tagged frames
  • Supports cyclic queuing and forwarding for all traffic classes
  • Traffic flow control with Credit Based Shaper
  • Time Aware shaper for handling Time-Sensitive Streams
  • Provides EEE capability with support for low power client
  • Capability exchange and setup using the LLDP packet exchange
  • PFC operation supported
  • PAUSE frame operation supported
  • MAC Merge capable of handling express and preemptable traffic classes supported
  • Handling of interspersed traffic
  • Verify - Respond mechanism for initialization of preemption capability between two ends of the link
  • MAC Security capable as per IEEE 802.1 AE - 2006 Ø AES-GCM 128 capable
  • Can handle Controlled and Uncontrolled port traffic
  • Timing synchronization capable using gPTP as per IEEE 802.1 AS
  • Also supports PTP (delay-request and peer to peer )
  • BMCA determination
  • Supports clock data recovery(CDR)
  • Supports for MMD registers, MDIO interface supported
  • Callback support in layers to provide user control
  • Rich set of configuration and parameters
  • Provides static as well as dynamic error injection capability
  • On the fly protocol checking and assertion checks
  • Built in coverage analysis
  • Graphical analyser to show transactions for easy debugging

Benefits

  • Available in native System Verilog (UVM/OVM/ VMM) and Verilog
  • Unique development methodology to ensure the highest levels of quality
  • Availability of Compliance & Regression Test Suites
  • 24X5 customer support
  • Unique and customizable licensing models
  • Exhaustive set of assertions and coverage points with connectivity example for all the components
  • Consistency of interface, installation, operation, and documentation across all our VIPs
  • Provide complete solution and easy integration in IP and SoC environment

Block Diagram

TSN Verification IP  
 Block Diagram

Deliverables

  • Ethernet BFM's for
    • TSN
    • MAC-Sec
    • MAC layer
    • Reconciliation layer
    • PCS Layer
    • PMA layer
    • PMD layer
    • AN layer
    • FEC layers (RS-FEC, BASE-R FEC)
  • Ethernet layered monitors and scoreboard
  • Test Environment & Test Suite:
    • Basic and Directed Protocol Tests
    • Random Tests
    • Error Scenario Tests
    • Assertions & Cover Point Tests
    • User Test Suite
  • Integration guide , user manual and release notes
  • GUI analyser to view simulation packet flow

Technical Specifications

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Semiconductor IP