IGAAFEV03A is a high speed analog front-end circuit for 5GNR application which supports 4T4R. IGAAFEV03A contains five 12 bit 16 Gs/s SAR ADCs, four 12 bit 16 GHz DACs and one 16 GHz PLL. IGAAFEV03A support I2C, JTAG, and APB 3-in-1 interface to handle configuration and functionality control for ADC, DAC, and PLL. Individual power down mode of each ADC, DAC, and PLL is built in for power consumption reduction.
IGAAFEV03A is designed and fabricated in TSMC 12 nm FF CMOS process.
TSMC CLN12FFC 16Gsps Analog Front-End
Overview
Key Features
- TSMC 12 nm 0.8 V/1.8 V CMOS LOGIC FinFET Compact Process
- Metal scheme: 1P9M (2Xa1Xd_h_3Xe_vhv_2Z) + UT-ALRDL
- Operating junction temperature: -40 oC ~ 125 oC
- Support 4T4R
- 12 bit 16 Gsps ADC
- 12 bit 16 Gsps DAC
- 16 GHz PLL
- Build in 16 GHz clock input bypass mode
- SoC interface data rate: 1 GHz
- Built-in pattern generator for DAC testing
- Built-in SRAM, and down sample for ADC test
- EHOST : APB, I2C, and JTAG register interface
- 1.8 V/0.9 V analog supply voltage and 0.8 V digital supply voltage
- Build in individual power down mode for each ADC, DAC, and PLL
- Special layer and device type: High-R Resistor, ulvt, MOM cap, SRAM
- IP GDS size: 1500 um (Width) x 8000 um (Height)
Technical Specifications
Foundry, Node
TSMC 12nm CLN12FFC
Maturity
Pre-silicon
TSMC
Pre-Silicon:
12nm