Spartan-3 LogiCORE Endpoint PIPE for PCI Express (PCIe)

Overview

Version 1.8 Now Supports Spartan™-3/3E/3A

The Xilinx Spartan-3 LogiCORE™ Endpoint PIPE for PCI Express® (PCIe®) protocol layer core is available for Xilinx low-cost 90nm Spartan-3/3E/3A families. PCIe is a high-speed duplex serial interface standard supported by many industry leaders. The PCIe PIPE Endpoint LogiCORE combined with a discrete PCIe PHY offers a complete PCIe Endpoint solution fully compliant to the PCI Express Base Specification v1.1.

Key Features

  • Compliant to PCI Express Base Specification v1.1
  • Discrete PHY Interface
  • PXPIPE - Interface to NXP discrete PHY
  • 8-bit 250MHz interface
  • 100 MHz reference clock
  • Support for spread spectrum clock to reduce EMI
  • Single PCIe 2.5 Gbps lane

Technical Specifications

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Semiconductor IP