SMIC 65nm LL Standard analog IO
Key Features
- Standard analog IO;
- Cell Size (Width * height) 30um * 228um with DUP stagger bonding pads;
- Work voltage: 1.2V or 1.8V analog input/output;
- SMIC 0.065?m Logic Salicide 1.2V/1.8V low leakage Process;
- Suitable for 6, 7, 8 and 9 layers application (single top metal);
- Suitable for 6, 7, 8, 9 and 10 layers application (double top metal);
Technical Specifications
Foundry, Node
SMIC 65nm LL
Maturity
In Production
SMIC
In Production:
65nm
LL
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