SMIC 0.25um 2.5V/3.3V PCI I/O Cells Library
Overview
VeriSilicon SMIC 0.25um 2.5V/3.3V PCI I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.25um logic 1P5M 2.5V/3.3V process. This library can take 5V tolerance. This library supports both Stagger I/O pads and Inline I/O pads.
Key Features
- SMIC 0.25um Logic 1P5M Salicide 2.5V/3.3V process
- 2.5V core and 3.3V external interface
- Meets the revision 2.2 of PCI local bus specification
- Cell count: 6 cells
- Suitable for four or five metal layers of physical design
- Easy interface with VeriSilicon SMIC 0.25um process standard I/O libraries
Technical Specifications
Foundry, Node
SMIC 0.25um
Maturity
GDS Ready
Availability
Now
SMIC
Pre-Silicon:
250nm
G
Related IPs
- GSMC 0.25um 2.5V/3.3V PCI I/O Cell Library
- CSMC13V33 process DUPIO, This library includes analog I/O cells and digital I/O cells and supports Inline DUP I/O pad.
- GSMC 0.15um 1.5V/3.3V PCI I/O Cells Library
- GSMC 0.15um 1.2V/3.3V PCI I/O Cells
- GSMC 0.18um PCI I/O Cells Library
- GSMC0.18um PCI I/O Cells DUP Library