VeriSilicon SMIC 0.18um Synchronous Memory Compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.18um Logic 1P6M Salicide 1.8/3.3V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of word and bit lengths. While satisfying speed and power requirements, it is optimized for area efficiency.
VeriSilicon SMIC 0.18um Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, or 6 as the top metal. Dummy bit cells are synthesized with the intention to enhance reliability.
SMIC 0.18um Single-Port/Dual-Port SRAM, Two-Port Register File and Diffusion ROM Compiler for Linux
Overview
Key Features
- Low Power
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
- Tri-State Output(SRAM only)
- Write Mask Function(SRAM & Register File)
Technical Specifications
Foundry, Node
SMIC, 0.18um
Maturity
Silicon proven
SMIC
Pre-Silicon:
180nm
EEPROM
,
180nm
G
,
180nm
LL
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