The VeriSilicon S13V33_ADC_03 IP is a 10 bit, low power, and pipeline analog to digital
converter capable of running at up to 50MHz conversion rate. The ADC cell integrates several
stages of sample/hold, MDAC stages, a reference bias circuit, and a clock circuit along with
the analog to digital converter circuit. The S13V33_ADC_03 operates when the power-down
signal (PWDN) is at logic level ‘0’, and goes into power-down state when the power-down
signal is at logic level ‘1’. The S13V33_ADC_03 IP is useful in a variety of data signal
conversion applications, especially in video applications.
SMIC 0.13um 3.3V 10Bit Single
Overview
Key Features
- 10bit up to 50MSPS conversion rate
- 2.0Vp-p differential input swing
- Pure internal voltage reference
- Supply voltage: 3.3V analog power;
- 1.2 V digital power
- Operating junction temperature:
- -40°C ~ +60°C ~ +120°C
- Excellent dynamic performance:
- --57dB SNR at Fin=1MHz
- --65dB SFDR at Fin=1MHz
- Fully differential structure
- Scaled power with clock frequency:
- --12MHz 12mA (mode<1:0>=01)
- ---24MHz 22mA (mode<1:0>=10)
- ---48MHz 41mA (Mode<1:0>=11)
Technical Specifications
Foundry, Node
SMIC 0.13um
Availability
GDS ready
SMIC
Pre-Silicon:
130nm
EEPROM
,
130nm
G
,
130nm
LL
,
130nm
LV