Single Port SRAM Compiler IP, UMC 0.35um process
Overview
UMC 0.35um Logic process synchronous high density Single Port SRAM memory compiler.
Technical Specifications
Short description
Single Port SRAM Compiler IP, UMC 0.35um process
Vendor
Vendor Name
Foundry, Node
UMC 350nm
UMC
Pre-Silicon:
350nm
Related IPs
- Single Port SRAM Compiler IP, UMC 65nm SP process
- Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
- Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
- Single Port SRAM compiler - Memory optimized for ultra high density and high speed - Dual Voltage - compiler range up to 640 k
- Single Port SRAM compiler - Memory optimized for ultra low power and high density - Dual Voltage - compiler range up to 512 k
- Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k