Single Port SRAM Compiler IP, UMC 0.35um process
Overview
UMC 0.35um Logic process standard asynchronous low density Low Power Single Port SRAM memory compiler.
Technical Specifications
Foundry, Node
UMC 350nm
UMC
Pre-Silicon:
350nm
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- Single Port SRAM compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 320 k
- Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 640 k
- Single Port SRAM compiler - Memory optimized for high density and low power - compiler range up to 320 k