Secure Hash Algorithm 384 IP Core
Overview
Bridge to APB, AHB, and AXI bus SHA2-384 is a universal solution that effectively speeds up the SHA2-384 hash function that complies with FIPS PUB 180-4. It has three options for computing message digests: 256, 224, or 384 bits. The maximum allowed input message length is 264 – 1 bit. The SHA2-384 HMAC (Keyed-Hash Message Authentication Code), a cryptographic mechanism specified in RFC 2104, is also natively supported by it, depending on the core settings. In digital signature protocols and usually in secure communication, this IP is appropriate for authenticity and data integrity checking. It might potentially be applied to speed up bitcoin calculations. Additionally, it has a context-swapping function that might be helpful in intricate systems when a task's preemption mechanism is in place.
Key Features
- FIPS PUB 180-4 compliant SHA2-384 function
- RFC 2104 compliant HMAC mode native support
- SHA2 224, 256, 384-bit modes support
- Secure storage for precomputed HMAC keys
- Hash/HMAC context swapping
- Internal, automatic padding module
- Binary message resolution support
- Flexible data read/write modes
- Software driver with OpenSSL/MbedTLS interface ready
- Available system interface wrappers:
- AMBA – APB / AHB / AXI Bus
- Altera Avalon Bus
- Xilinx OPB Bus
Block Diagram
Applications
- Digital signature
- Data integrity
- Key derivation
- TLS/SSH/PGP IPsec communication
Deliverables
- Source Code:
- VERILOG test bench environment
- Technical documentation
- Synthesis scripts
- Example application
- Technical support
Technical Specifications
Maturity
In Production
Availability
Immediately