ROM Compiler IP, UMC 0.35um process
Overview
UMC 0.35um Logic process standard asynchronous VIA2 programmed ROM memory compiler.
Technical Specifications
Short description
ROM Compiler IP, UMC 0.35um process
Vendor
Vendor Name
Foundry, Node
UMC 350nm
UMC
Pre-Silicon:
350nm
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- Single Port SRAM Compiler IP, UMC 65nm SP process
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- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k