Reed Solomon II Intel® FPGA IP Core

Overview

The Reed Solomon II Intel® FPGA intellectual property (IP) core offers a fully parameterizable Reed Solomon encoder and decoder. These encoders and decoders are widely used for error detection and correction in a wide range of digital signal processing (DSP) applications for storage, retrieval, and transmission of data. The Reed Solomon II Intel FPGA IP core is designed to support optical transport network (OTN) applications.

Key Features

Number of symbols per code word (range: 204 to 255)

Technical Specifications

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