The QDR II SRAM Controller Intel® FPGA IP function provides an easy-to-use interface to QDR II SRAM modules. The QDR II SRAM Controller ensures that the placement and timing are in line with QDRII specifications.
QDR II SRAM Controller Intel® FPGA IP
Overview
Key Features
- Support for QDR II and QDR II+ SRAMs
- Support for burst of two and four memory type
- Support for 8 bit, 18 bit, and 36 bit QDRII SRAM interfaces
- Flexible and robust design
- Support for two-times and four-times data width on the local side (four-times for burst of four only)
- Automatic concatenation of consecutive reads and writes (narrow local bus width mode only)
- Intellectual property (IP) functional simulation models for use in VHDL and Verilog HDL simulators supported by Intel
- Easy-to-use IP Toolbench interface and example design
- Support for Intel® FPGA IP Evaluation Mode