Power on Reset IP, Input: 1.0V, Vrr=0.67V, Vfr=0.62V, UMC 55nm SP process
Overview
Vrr=0.67V, Vfr=0.62V, input 1.0V, Core type, Power On Reset, UMC 55nm SP/RVT Low-K process.
Technical Specifications
Short description
Power on Reset IP, Input: 1.0V, Vrr=0.67V, Vfr=0.62V, UMC 55nm SP process
Vendor
Vendor Name
Foundry, Node
UMC 55nm SP
UMC
Pre-Silicon:
55nm