Power input 3.3V, Comparator ; UMC 55nm SST uLP/HVT Low-K Logic Process
Overview
Power input 3.3V, Comparator ; UMC 55nm SST uLP/HVT Low-K Logic Process
Technical Specifications
Foundry, Node
UMC 55nm eNVM EFLASH/EE2PROM/uLP-SPLIT_GATE
UMC
Pre-Silicon:
55nm
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