Phase-frequency detector (PFD) is used to form a control signal VCO tuning. PFD compares phases of divided VCO signals and divided reference oscillator signals and detects phase difference. Charge pump generates pulses for the loop filter. This structure includes ECL charge pump and CMOS charge pump.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.
Phase frequency detector and charge pump
Overview
Key Features
- iHP SGB25V
- Input CMOS signal
- Low output current disbalance
- High lock detector accuracy
- Portable to other technologies (upon request)
Applications
- Phase-locked loop synthesizer
Deliverables
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Technical Specifications
Foundry, Node
iHP SiGe BiCMOS 0.25 um
Maturity
Silicon proven
Availability
Now
Related IPs
- Phase frequency detector and charge pump
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- PLL ECL phase-frequency detector with ECL charge pump