Phase-frequency detector (PFD) forms control signal for VCO tuning. PFD compares phases of divided VCO signal and divided reference oscillator signal and detects phase difference. Charge pump generates pulses for loop filter. Reference frequency 0.32…10 MHz. Output current is 41...142.5 uA.
The block is fabricated on iHP SiGe BiCMOS 0.25 um (SGB25V) technology.
PLL ECL phase-frequency detector with ECL charge pump
Overview
Key Features
- iHP SGB25V
- Input signals with low amplitude
- Low disbalance of output current
- Portable to other technologies (upon request)
Applications
- Phase-locked loop synthesizer
Deliverables
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Technical Specifications
Foundry, Node
iHP SiGe BiCMOS 0.25 um
Maturity
Pre-silicon verification
Availability
Now
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