PCI Express Gen 4 PHY

Key Features

• Support 16GT 8GT 5GT 2.5GT data rate
• Compliant with PCI Express 4.0, 3.1, 2.1, 1.1 and PIPE 4.2 standards
• x1, x2, x4, x8, x16 lane configuration with bifurcation
• Multi-tap adaptive programmable continuous time linear equalizer (CTLE) and decision feedback equalizer (DFE)
• Support L1 SUB low power consumption mode status
• Support SRIS
• Built-in self-check vector, PRBS generation and check mechanism
• Temperature range -40°C-125°C
• Support Flip chip packaging

Technical Specifications