Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)

Overview

Key Features

• Lossless compression/decompression specification of Shikino-High Tech original algorithm.
• The core get Highest Compression and Smallest circuit by we have grown up compression/decompression algorithm
• Available of loading both ASIC and FPGA.
• Image in/output format:pixel interleave
• Image size : arbitrary
• Operation mode like processing mode, image size etc. are set in internal register via external CPU.
• Written from external during compression, and downloaded from compressed data during decompression.
• Marker : Automatically generated on Encode, and automatically analyzed on Decode.
• DLL for compression / decompression provided (windows version)

Block Diagram

Applications

• Smart phone
• Digital still cameras
• Broadcast equipment
• Medical equipment
• info input/output system
• Monitoring system
• Aerospace image system
• image data transfer unit
• Image transfer devices

Deliverables

• RTL:Verilog-HDL
• C-Model
• Specification Document
• Simulation environment
• Synthesis scripts

Technical Specifications