Multiplier Accumulator

Overview

Included with Xilinx ISE Software

The Multiplier Accumulator IP core product is a parallel multiplier accumulator module that performs fixed or programmable-length accumulations. The core's A and B inputs use unsigned or signed data of up to 32 bits wide. The core has selectable pipeline levels. It offers truncation and rounding of the multiplier output. The core also has an accumulation saturation option, optional carry in, carry out, overflow pins, and input/output registers.

Key Features

  • Parallel multiply accumulator module.
  • Signed or Unsigned inputs parameterizable up to 32-bits.
  • Automatic optimization for speed.
  • Parameterizable rounding modes or output.
  • Support for saturation.

Technical Specifications

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Semiconductor IP