Multi-PHY Receiver Link Controller

Overview

Key Features

• SLVS-EC v1.2 / MIPI CSI2 v1-2 / MIPI D-PHY v1-2 Compliant
• Supports Curious Multi-PHY
• Supports PHY mode:
  • SLVS-EC, MIPI DPHY/CSI2 Link Layer, Sub-LVDS Interface, CMOS Input
• Maximum Lane Number: DATA 8Lane CLOCK 2Lane
• Supports Link Ports: 2 Port
• SLVS-EC :
  • Data Format: RAW8/10/12/14/16
  • Supports HDR(DOL)
  • Supports CRC32
• MIPI DPHY/CSI2 Link Layer:
  • Data Format: RAW8/10/12/14/16, YUV422/420, RGB 888/555/565/101010
  • Supports HDR(DOL DINFO) and HDR(Virtual Channel)
  • Supports DESKEW function.
  • Various application interface are supported by custom option.
• Sub-LVDS Interface:
  • Data Format: RAW8/10/12/14/16
  • Supports SOF/SOL/EOL/EOF/Pixel Data transfer mode
  • Supports Sony SAV/EAV code transfer mode
  • Supports HDR(DOL DINFO) and HDR(DOL HINFO)
• CMOS:
  • Direct data output pins from PHY Analog Layer
• Register control:
  • Supports AMBA-APB I/F or Direct pin inputs
• TEST I/F:
  • Supports PHY Analog layer loop back test mode
  • Supports Monitor test outputs for PHY internal signals

Technical Specifications