MIPI Receiver CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process_x005F_x000D_
Overview
MIPI Receiver CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process
Technical Specifications
Foundry, Node
UMC 28nm Logic/Mixed_Mode HPC
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
Related IPs
- MIPI C-PHY V1.1 TSMC 28nm HPC+
- MIPI Transmitter CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process
- MIPI CSI-2 controller Receiver v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
- MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI D-PHY Rx-Only 2 Lanes in UMC (28nm)
- MIPI D-PHY Rx-Only 4 Lanes in UMC (28nm, 22nm)