IP Catalog > Interface IP Cores > MIPI IP > MIPI Controller IP > MIPI I3C IP > MIPI I3C Controller

MIPI I3C Controller

Overview

Controller IP for the MIPI I3C interface

Compliant with the MIPI® I3C® specification and legacy compatible with the I2C specification, the Controller IP for MIPI I3C is engineered to quickly and easily integrate into any mobile embedded SoC device and expand sensor communication capabilities with better performance and power efficiency. The MIPI I3C Controller contains the capability to be either the Initiator/Host or the Target on the I3C bus.

Key Features

  • Support for Multiple Transmission Modes with Single Data Rate (SDR) and High Data Rate (HDR)
  • Support for I3C Common Command Code
  • Dynamic address assignment (DAA) support

Block Diagram

MIPI I3C Controller Block Diagram

Applications

  • Automotive,
  • Communications,
  • Consumer Electronics,
  • Data Processing,
  • Industrial and Medical,
  • Military/Civil Aerospace,
  • Others

Deliverables

  • Documentation—Integration guide, user guide, and release notes
  • Clean, readable, synthesize-able Verilog RTL
  • Synthesis scripts
  • Sample verification testbench with integrated BFM, monitors, and sanity tests

Technical Specifications

Maturity
Silicon Proven
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