The CL12631I4T1AS1BIP2500 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System.
The CL12631I4T1AS1BIP2500 converts the input parallel data to the serial data and output it.
The CL12631I4T1AS1BIP2500 is designed to support maximum 2.5Gbps data rate utilizing mipi-DPHY_specification_v1-2.
MIPI D-PHY Transmitter 4-Lane (4-Data/1-Clock) 250Mbps
Overview
Key Features
- MIPI-DPHY v1-2 / MIPI CSI2 compliant
- Supporting Differential Output Signals: MIPI-DPHY (Maximum 2.5Gbps)
- Input Clock Frequency: (MIPI-DPHY 8bit SER) PCK_N= ~313MHz
- Output Clock Frequency: ~1250MHz Output Data Rate: ~2.5Gbps
- Power Supply : 2.8V, 1.2V(PLL/BGR) 1.2V(PHY)
- Max TX Lane Number: Clock 1-port / Data 4-ports (lanes)
- Data Input Path: 8bit Parallel
- Include Power Down Mode
- Include Output clock's On/Off Mode
- Include Dp, Dm polarity Control
- TPSCo 65nm BSB Process
- Triple well structure Layer: 7M/1L (1M~6M, 9M, L) 1.2V / 3.3V Transistor
- Various process porting support available (Please contact us.)
- Supporting Link-layer (Soft Macro): CD12631
Technical Specifications
Foundry, Node
TPSCo 65nm BSB
Maturity
Silicon Proven
Availability
Now
TSMC
Silicon Proven:
28nm
HPCP
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