MIPI CSI-3 Synthesizable Transactor provides a smart way to verify the MIPI CSI-3 component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's MIPI CSI-3 Synthesizable Transactor is fully compliant with standard version 2.0 MIPI Alliance specification and provides the following features.
MIPI CSI-3 Synthesizable Transactor
Overview
Key Features
- Supports Version 1.1 MIPI CSI-3 Specification
- Supports transmission of Image frame
- Supports transmission of Attribute packets
- Supports Data transmission on multiple Virtual Channels
- CAL provides support for camera configuration, camera control and data transport
- Includes Proven MIPI UniPro and M-PHY bfm components for lower layer verification
- M-PHY supports various transmission speed steps and ranges from 0.01 Mbps up to 5.8 Gbps per Lane
- Supports all lane configurations
- Supports implementation of standalone ISPs
- Supports interleaving of streams
- Supports all CSI-2 legacy data formats
- Supports following error insertion and detection
- All MIPI MPHY errors
- Disparity errors
- Invalid code group errors
- All Unipro errors
- Invalid frame formats
- L2 Credit violation
- Cport buffer violation
- Supports compressed image data
- The CCI device supports all four different read operations
- Single read from random location
- Sequential read from random location
- Single read from current location
- Sequential read from current location
- The CCI device supports all two different write operations
- Single write to random location
- Sequential write starting from random location
- The CCI supports the following register width
- 8-bit
- 16-bit
- 32-bit
- 64-bit
- Compatible with testbench writing using SmartDV's VIP
- All UVM sequences/testcases written with VIP can be reused
- Runs in every major emulators environment
- Runs in custom FPGA platforms
- Synthesizable transactors
- Complete regression suite containing all the MIPI CSI-3 testcases
- Examples showing how to connect various components, and usage of Synthesizable Transactor
- Detailed documentation of all DPI, class, task and functions used in verification env
- Documentation also contains User's Guide and Release notes
Benefits
Block Diagram
