MIPI CSI-2 Transmitter for FPGA
Overview
MIPI CSI-2 Tx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processer
Key Features
- •Realize MIPI I/F with Low cost
- •Series development for small quantity, large variety
- •Available for evaluation of Product development
- •Data Lane 1~4Lane
- •Bit Rate Max 1.5Gbps/Lane
- •Data Formats Raw8/10/12/14?RGB565/666/888?YUV422(8/10bit)etc
Block Diagram
Applications
- Automotive
- Communications Consumer Electronics
Deliverables
- • RTL:Verilog-HDL
- • Functional specification sheet
- • Design specification sheet
- • Verification environment(sample pattern)
Technical Specifications
Availability
We also accept customization according to customer needs.
Related IPs
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- Multi-Video-Source Multiplexing Serial Video Transmitter for MIPI CSI2
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- MIPI C-PHY/D-PHY Combo CSI-2 TX (Transmitter) IP in TSMC 65LP
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