MIPI CSI-2 Synthesizable Transactor provides a smart way to verify the MIPI CSI-2 component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's MIPI CSI-2 Synthesizable Transactor is fully compliant with standard version 3.0 MIPI Alliance specification and provides the following features.
MIPI CSI-2 Synthesizable Transactor
Overview
Key Features
- Supports 3.0 MIPI CSI-2 Specification.
- Compliant with MIPI CSI2 Bus Specification v1.0 to v1.3, v2.0 to v2.10, v3.0.
- Full MIPI CSI2 Tx/Rx functionality
- Support both DPHY and CPHY.
- Supports forward escape ULPM on all Data Lanes.
- Supports image applications with varying pixel formats from six to twenty-four bits per pixel.
- Supports all types of short packets.
- Supports all types of long packets.
- Supports all lane configurations.
- Supports all virtual channel identifiers.
- Supports virtual channel extension field.
- Supports line and frame synchronization packets.
- Supports data scrambling.
- Supports skew calibration.
- Supports Smart Region of Interest (SROI).
- Supports Unified Serial Link (USL).
- Supports Latency Reduction and Transport Efficiency (LRTE).
- Supports various methods to interleave the transmission of different image data formats
- Interleaved data transmission using data type value
- Interleaved data transmission using virtual channels
- Supports various methods to interleave the data transmission using data type value
- Packet level interleaved data transmission
- Frame level interleaved data transmission
- Supports high speed mode of operation.
- Supports various kinds of Tx and Rx error generation and detection
- SoT error
- Sync error
- Word count error
- Sync length error
- Checksum error
- ECC error
- Timeout errors
- Supports Compression for RAW Data Types.
- Supports serial Interface(PHY)
- Supports PPI Interface
Benefits
- Compatible with testbench writing using SmartDV's VIP
- All UVM sequences/testcases written with VIP can be reused
- Runs in every major emulators environment
- Runs in custom FPGA platforms
Block Diagram
Deliverables
- Synthesizable transactors
- Complete regression suite containing all the MIPI CSI-2 testcases
- Examples showing how to connect various components, and usage of Synthesizable Transactor
- Detailed documentation of all DPI, class, task and functions used in verification env
- Documentation also contains User's Guide and Release notes