Memory Interface
Overview
Memory Interface is a free software tool used to generate memory controllers and interfaces for Xilinx® FPGAs. Memory Interface generates unencrypted Verilog or VHDL design files, UCF constraints, simulation files and implementation script files to simplify the design process. Memory Interfaces supported are: DDR3 SDRAM, DDR2 SDRAM, QDRII SRAM, and DDRII SRAM, LP DDR, QDRII+ SRAM, and RLDRAM II.
Key Features
- Memory Interface generates through a Graphic User Interface the unencrypted Verilog or VHDL design files, UCF constraints, and simulation script files to simplify the memory interface design process.
- Memory modules (DIMM) are supported for DDR3, DDR2 and DDR SDRAMs.
- OS Support
- 64-bit/32-bit Linux Red hat Enterprise 4.0
- 64-bit XP Professional
- 32-bit Vista business
- 64-bit SUSE 10
- Windows XP
Technical Specifications
Related IPs
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- 10-Gigabit Ethernet FIFO Memory Interface
- PCI Master/Target Interface Core
- Fast Access Controller – a plug-and-play IP solution for fast embedded Flash Programming and Memory Testing
- 32-bit, 33 MHz Multifunction Target Interface