LTE turbo decoder
Overview
TC7000-LTE is a convolutional turbo code (CTC) decoder optimized for FPGAs. Its unique pipe-line architecture enables to reach very high clock frequencies on high end FPGAs It offers several algorithm options to meet various trade-offs between error correction performance versus Core complexity.
Key Features
- Covers rate-matching, turbo decoding and CRC decoding
- Throughput level 75 to 300 Mbps
- Near floating point error correction performance
- High throughput Max-Log-MAP algorithm
- Efficient and flexible optional Log-MAP algorithm
- Multi-processor architecture, several throughput levels selectable before synthesis - from 75 to 300 Mbits/s decoded
- Optimal iteration stopping feature for reducing average number of iterations without performance degradation
- On-the-fly change of block length and number of iterations
- Low latency
- No external memory required
- Available on all popular Xilinx, Altera and Lattice devices
- Field proven
Applications
- LTE
- LTE-A
Technical Specifications
Maturity
silicon proven
Availability
off-the-shelf