Low Power MCU I/O
Overview
This I/O library can easily support digital core voltage power off, and voltage transformation between different voltage domains. The common GPIOs contain not only digital functional cells, but also analog input/output cells.
Key Features
- Supports digital core voltage power off, and get ultra-low leakage
- All GPIOs support that the voltage of PAD is higher than I/O power
- DUP structure to help customer reduce cost
- Built in power-on-control function to prevent chip latch-up potential risk during chip
- powering up
- Lower than 100nA power consumption for 32.768KHz crystal driver
Applications
- MCU
- IoT SoC
Technical Specifications
Maturity
Available on request
Related IPs
- High Performance / Low Power Microcontroller Core
- Ultra low power C-programmable DSP core
- Highest code density, Low Power 32-bit Processor with optional DSP
- Ultra low power, high-performance DSP / controller RISC core
- Ultra low power C-programmable Baseband Signal Processor core
- 2D (vector graphics) & 3D GPU IP A GPU IP combining 3D and 2D rendering features with high performance, low power consumption, and minimum CPU load