low power, high speed, and high density configurable CAM

Overview

The Novelics compiler-based family of advanced embedded memories include low-power, high- speed, and high-density configurable CAM targeting the most demanding SoC applications.

Embedded CAM block(s) are user-definable for organization and performance depending on your SoC, ASIC, or ASSP requirements.

Behind Novelics’ breakthrough embedded memory performance is an advanced compiler- based memory generator and optimizer, MemQuest™, which enables the concurrent optimization of embedded memory designs for power, speed, density, and DFT objectives.

Key Features

  • Based on patent-pending highdensity, low- power cell design
  • Implemented in standard CMOS logic process
  • Multiple match outputs
  • Single-cycle match and lookup capability
  • Comprehensive search functionality
  • Supports binary and true ternary formats
  • Designer selectable process node(s), power, speed, and aspect ratio
  • Industry leading active power, leakage current, density and speed
  • Optimized core and peripheral circuitry with in-situ power management
  • Standby and power down modes
  • Selectable power/speed tradeoffs
  • Ideal for networking, communications, and compression applications
  • Silicon-validated at major Foundries
  • Support for 130nm with a migration path to 90nm, 65nm, and beyond at major foundries
  • Flexible IP Licensing Models
  • Supported Foundries: TSMC, UMC, SMIC, SilTerra, IBM, Chartered and Samsung

Technical Specifications

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Semiconductor IP