10G to 400G High Speed Channelized Ethernet Controller MAC/PCS/FEC

Overview

400G aggregate bandwidth channelized solution for up to eight Ethernet channels

Cadence High Speed Ethernet Controller IP supports multi-channel Ethernet applications for high-performance computing (HPC), networking, artificial intelligence and machine learning (AI/ML) and 5G Wireless commmunications. It provides a complete Ethernet subsystem solution up to 800G along with Cadence High Speed Ethernet SerDes PHYs.

Key Features

  • Compliant with IEEE 802.3 and Ethernet Technology Consortium specifications
  • Integrated FEC support including RS (528,514), RS(544,514), Firecode, Ethernet Technology Consortium Low Latency RS FEC
  • Supports 802.3 PAUSE and 802.10bb Priority Flow Control (PFC) frame-based flow control, 802.3br Interspersing Express Traffic (IET) and IEEE 802.1AS Precision Time Protocol (PTP)
  • APB interface for management and control
  • Loopback modes provided for fault diagnostics
  • Complete Ethernet subsystem solutions up to 800G along with Cadence High Speed Ethernet SerDes PHYs

Applications

  • Automotive,
  • Communications,
  • Consumer Electronics,
  • Data Processing,
  • Industrial and Medical,
  • Military/Civil Aerospace,
  • Others

Deliverables

  • Verilog HDL source code
  • Cadence Encounter RTL Compiler synthesis scripts
  • Datasheet and user guide with full programming interface, parameterization instructions, and synthesis instructions
  • Firmware core and Linus driver package, Verilog testbench

Technical Specifications

Maturity
In Production
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Semiconductor IP