Linear Regulator IP, UMC 0.13um HS/FSG process

Overview

USB 2.0 Two Port PHY, UMC 0.13um HS/FSG Logic process.

Technical Specifications

Short description
Linear Regulator IP, UMC 0.13um HS/FSG process
Vendor
Vendor Name
Foundry, Node
UMC 130nm HS/FSG
UMC
Pre-Silicon: 130nm
×
Semiconductor IP